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Hiroki Koike
Observed names:
H. KOIKE,
H. Koike,
Hiroki KOIKE,
Koike,
Koike, Hiroki
Observed institutions:
NEC (Japan),
Toshiba (Japan),
Tohoku University,
Japan Science and Technology Agency,
Center for Innovative Integrated Electronic Systems, Tohoku University,
National Institute of Advanced Industrial Science and Technology
show all 6
ORCID:
0000-0002-2494-7595
Observed ORCID:
0000-0002-2494-7595
OpenAlex ID:
A5004580322
An Overview of Nonvolatile Emerging Memories— Spintronics for Working Memories
2016
·
Tetsuo Endoh
, Hiroki Koike
, et al.
·
IEEE Journal on Emerging and Selected Topics in Circuits and Systems
·
179
Standby-Power-Free Integrated Circuits Using MTJ-Based VLSI Computing
2016
·
Takahiro Hanyu
, Tetsuo Endoh
, et al.
·
Proceedings of the IEEE
·
142
Demonstration, Analysis, and Device Design Considerations for Independent DG MOSFETs
2005
·
M. Masahara
, Y. Liu
, et al.
·
IEEE Transactions on Electron Devices
·
125
First demonstration of field-free SOT-MRAM with 0.35 ns write speed and 70 thermal stability under 400°C thermal tolerance by canted SOT structure and its advanced patterning/SOT channel technology
2019
·
H. Honjo
, T. V. A. Nguyen
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
89
A 1 Mb Nonvolatile Embedded Memory Using 4T2MTJ Cell With 32 b Fine-Grained Power Gating Scheme
2013
·
Takashi Ohsawa
, Hiroki Koike
, et al.
·
IEEE Journal of Solid-State Circuits
·
87
A 30-ns 64-Mb DRAM with built-in self-test and self-repair function
1992
·
A. Tanabe
, T. Takeshima
, et al.
·
IEEE Journal of Solid-State Circuits
·
81
A 47.14-$\mu\text{W}$ 200-MHz MOS/MTJ-Hybrid Nonvolatile Microcontroller Unit Embedding STT-MRAM and FPGA for IoT Applications
2019
·
Masanori Natsui
, Yasuo Noguchi
, et al.
·
IEEE Journal of Solid-State Circuits
·
68
NV-SRAM: a nonvolatile SRAM with backup ferroelectric capacitors
2001
·
T. Miwa
, J. Yamada
, et al.
·
IEEE Journal of Solid-State Circuits
·
65
High-speed simulator including accurate MTJ models for spintronics integrated circuit design
2012
·
Noboru Sakimura
, Ryusuke Nebashi
, et al.
·
IEEE International Symposium on Circuits and Systems proceedings
·
60
14ns write speed 128Mb density Embedded STT-MRAM with endurance>1010 and 10yrs retention@85°C using novel low damage MTJ integration process
2018
·
H. Sato
, H. Honjo
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
58
1Mb 4T-2MTJ nonvolatile STT-RAM for embedded memories using 32b fine-grained power gating technique with 1.0ns/200ps wake-up/power-off times
2012
·
T. Ohsawa
, H. Koike
, et al.
·
Symposium on VLSI Circuits
·
58
A 60-ns 1-Mb nonvolatile ferroelectric memory with a nondriven cell plate line write/read scheme
1996
·
H. Koike
, T. Otsuki
, et al.
·
IEEE Journal of Solid-State Circuits
·
42
A BIST scheme using microprogram ROM for large capacity memories
2002
·
H. Koike
, T. Takeshima
, et al.
·
IEEE International Test Conference (ITC)
·
39
10 nm\phi perpendicular-anisotropy CoFeB-MgO magnetic tunnel junction with over 400°C high thermal tolerance by boron diffusion control
2015
·
H. Honjo
, T. Tanigawa
, et al.
·
Symposium on VLSI Technology
·
32
Restructuring of memory hierarchy in computing system with spintronics-based technologies
2012
·
Tetsuo Endoh
, Takashi Ohsawa
, et al.
·
Symposium on VLSI Technology
·
32
Impact of Tungsten Sputtering Condition on Magnetic and Transport Properties of Double-MgO Magnetic Tunneling Junction With CoFeB/W/CoFeB Free Layer
2017
·
H. Honjo
, S. Ikeda
, et al.
·
IEEE Transactions on Magnetics
·
30
12.1 An FPGA-Accelerated Fully Nonvolatile Microcontroller Unit for Sensor-Node Applications in 40nm CMOS/MTJ-Hybrid Technology Achieving 47.14μW Operation at 200MHz
2019
·
Masanori Natsui
, Daisuke Suzuki
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
28
A 600MHz MTJ-based nonvolatile latch making use of incubation time in MTJ switching
2011
·
T. Endoh
, S. Togashi
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
27
Improvement of Thermal Tolerance of CoFeB–MgO Perpendicular-Anisotropy Magnetic Tunnel Junctions by Controlling Boron Composition
2016
·
H. Honjo
, S. Ikeda
, et al.
·
IEEE Transactions on Magnetics
·
25
A power-gated MPU with 3-microsecond entry/exit delay using MTJ-based nonvolatile flip-flop
2013
·
H. Koike
, T. Ohsawa
, et al.
·
IEEE Asian Solid-State Circuits Conference (A-SSCC)
·
24
A 60 ns 1 Mb nonvolatile ferroelectric memory with non-driven cell plate line write/read scheme
2002
·
H. Koike
, T. Otsuki
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
24
1T1MTJ STT-MRAM Cell Array Design with an Adaptive Reference Voltage Generator for Improving Device Variation Tolerance
2015
·
Hiroki Koike
, Sadahiko Miura
, et al.
·
IEEE International Memory Workshop (IMW)
·
18
Flex-Pass-Gate SRAM Design for Static Noise Margin Enhancement Using FinFET-Based Technology
2007
·
S. O'uchi
, M. Masahara
, et al.
·
Custom Integrated Circuits Conference
·
16
Polarization reversal kinetics of a lead zirconate titanate thin-film capacitor for nonvolatile memory
2000
·
Aya Seike
, Kazushi Amanuma
, et al.
·
Journal of Applied Physics
·
16
A 128 kb FeRAM macro for a contact/contactless smart card microcontroller
2002
·
J. Yamada
, T. Miwa
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
15
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Works count:
81
Citation count:
1,624
H-index:
21
I10-index:
35
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