Author

Ingrid Debusschere

Observed names: Debusschere, I., Debusschere, Ingrid, I Debusschere, I. Debusschere

Institution: IMEC

Observed institutions: IMEC, KU Leuven

OpenAlex ID: A5032786313

3D stacked IC demonstration using a through Silicon Via First approach

2008 · J. Van Olmen, A. Mercha, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 138

A Foveated Retina-Like Sensor Using CCD Technology

1989 · J. Van der Spiegel, G. Kreider, et al. · Kluwer international series in engineering and computer science · 114

A 1006 element hybrid silicon pixel detector with strobed binary output

1992 · F. Anghinolfi, P. Aspell, et al. · IEEE Transactions on Nuclear Science · 95

3D stacked ICs using Cu TSVs and Die to Wafer Hybrid Collective bonding

2009 · G. Katti, A. Merc, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 72

Highly Scaled Vertical Cylindrical SONOS Cell With Bilayer Polysilicon Channel for 3-D nand Flash Memory

2011 · G. Van den bosch, G. S. Kar, et al. · IEEE Electron Device Letters · 47

Impact of through silicon via induced mechanical stress on fully depleted Bulk FinFET technology

2012 · W. Guo, G. Van der Plas, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 39

Copper through silicon via induced keep out zone for 10nm node bulk FinFET CMOS technology

2013 · W. Guo, V. Moroz, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 38

Hybrid Floating Gate Cell for Sub-20-nm NAND Flash Memory Technology

2012 · P. Blomme, A. Cacciato, et al. · IEEE Electron Device Letters · 31

Impact of crystallization behavior of SrxTiyOz films on electrical properties of metal-insulator-metal capacitors with TiN electrodes

2010 · M. A. Pawlak, B. Kaczer, et al. · Applied Physics Letters · 31

Temperature dependent electrical characteristics of through-si-via (TSV) interconnections

2010 · G. Katti, A. Mercha, et al. · IEEE International Interconnect Technology Conference (IITC) · 30

Integration of CMOS-electronics and particle detector diodes in high-resistivity silicon-on-insulator wafers

1993 · B. Dierickx, D. Wouters, et al. · IEEE Transactions on Nuclear Science · 28

Retinalike space variant CCD sensor

1990 · Gregory Kreider, Jan Van der Spiegel, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 26

A retinal CCD Sensor for fast 2D shape recognition and tracking

1990 · I. Debusschere, E. Bronckaers, et al. · Sensors and Actuators A Physical · 26

Impact of bottom electrode and SrxTiyOz film formation on physical and electrical properties of metal-insulator-metal capacitors

2011 · M. A. Pawlak, B. Kaczer, et al. · Applied Physics Letters · 25

Development of silicon micropattern pixel detectors

1994 · E.H.M. Heijne, F. Antinori, et al. · Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment · 25

A low-cost 90nm RF-CMOS platform for record RF circuit performance

2005 · W. Jeamsaksiri, D. Linten, et al. · Symposium on VLSI Technology · 22

Novel Bi-Layer Poly-Silicon Channel Vertical Flash Cell for Ultrahigh Density 3D SONOS NAND Technology

2011 · G. S. Kar, G. Van den bosch, et al. · IEEE International Memory Workshop (IMW) · 19

Fully integrated CMOS pixel detector for high energy particles

1989 · G. Vanstraelen, I. Debusschere, et al. · Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment · 19

New concepts for integrated solid state detector electronics

1988 · G. Vanstraelen, I. Debusschere, et al. · Nuclear Instruments and Methods in Physics Research Section A Accelerators Spectrometers Detectors and Associated Equipment · 17

Impact of thinning and through silicon via proximity on High-k / Metal Gate first CMOS performance

2010 · A. Mercha, A. Redolfi, et al. · Symposium on VLSI Technology · 16

An Ultra-Thin Hybrid Floating Gate Concept for Sub-20nm NAND Flash Technologies

2011 · Dirk Wellekens, Pieter Blomme, et al. · IEEE International Memory Workshop (IMW) · 15

Novel dual layer floating gate structure as enabler of fully planar flash memory

2010 · Pieter Blomme, Maarten Rosmeulen, et al. · Symposium on VLSI Technology · 14

Ultra thin hybrid floating gate and high-k dielectric as IGD enabler of highly scaled planar NAND flash technology

2012 · G. S. Kar, L. Breuil, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 13

Standard cell level parasitics assessment in 20nm BPL and 14nm BFF

2012 · P. Schuddinck, M. Badaroglu, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 12

(Invited) Plasma Enhanced Atomic Layer Deposited Ruthenium for MIMCAP Applications

2011 · Johan Swerts, M.M. Salimullah, et al. · ECS Transactions · 12

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Works count: 79

Citation count: 1,068

H-index: 18

I10-index: 29