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Vineet Wason

Observed name: V. Wason
OpenAlex ID: A5039845740
A probabilistic framework to estimate full-chips subthreshold leakage power distribution considering within-die and die-to-die P-T-V variations
2004 · Songqing Zhang, Vineet Wason, et al. · International Symposium on Low Power Electronics and Design (ISLPED) · 58
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant era
2004 · Anirban Basu, Sheng-Chih Lin, et al. · ACM/IEEE Design Automation Conference (DAC) · 48
A probabilistic framework for power-optimal repeater insertion in global interconnects under parameter variations
2005 · V. Wason, K. Banerjee · International Symposium on Low Power Electronics and Design (ISLPED) · 15
Extraction of Self-Heating Free I-V Curves Including the Substrate Current of PD SOI MOSFETs
2007 · Qiang Chen, Zhi-Yuan Wu, et al. · IEEE International Conference on Microelectronic Test Structures (ICMTS) · 11
Critical current (ICRIT) based SPICE model extraction for SRAM cell
2008 · Qiang Chen, Sriram Balasubramanian, et al. · IEEE International Conference on Solid-State and Integrated Circuit Technology · 7
An Efficient Uncertainty- and Skew-aware Methodology for Clock Tree Synthesis and Analysis
2007 · Vineet Wason, Rajeev Murgai, et al. · International Conference on VLSI Design · 7
Statistical Compact Modeling and Si Verification Methodology
2006 · Vineet Wason, Judy An, et al. · IEEE International Conference on Solid-State and Integrated Circuit Technology · 2
SPICE parameter extraction and RO validation of a 65nm SOI technology
2008 · J.-S. Goo, Q. Chen, et al. · IEEE International SOI Conference (SOI) · 1
Extraction of speculative SOI MOSFET models using self-heating-free targets
2008 · Qiang Chen, Zhi-Yuan Wu, et al. · IEEE International Conference on Solid-State and Integrated Circuit Technology
Works count: 12
Citation count: 149
H-index: 6
I10-index: 4
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