Product
Help
Pricing
About
Jobs
Log in
Get started
Author
Add to collection
M. Gerhardt
Observed name:
M Gerhardt
Observed institution:
IBM (United States)
ORCID:
0009-0008-8203-4680
Observed ORCID:
0009-0008-8203-4680
OpenAlex ID:
A5084887428
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
2005
·
E. Leobandung
, H. Nayakama
, et al.
·
Symposium on VLSI Technology
·
63
Integration and optimization of embedded-sige, compressive and tensile stressed liner films, and stress memorization in advanced SOI CMOS technologies
2005
·
L.T. Su
, J. Pellerin
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
62
Multiple Stress Memorization In Advanced SOI CMOS Technologies
2007
·
A. Wei
, M. Wiatr
, et al.
·
Symposium on VLSI Technology
·
40
Process Integration Issues with Spike, Flash and Laser Anneal Implementation for 90 and 65 NM Technologies
2006
·
Th. Feudel
, M. Horstmann
, et al.
·
International Conference on Advanced Thermal Processing of Semiconductors
·
10
Sub-50nm gate length SOI transistor development for high performance microprocessors
2004
·
M. Horstmann
, D. Greenlaw
, et al.
·
Materials Science and Engineering B
·
9
Temperature scaling for 35nm gate length high-performance CMOS
2004
·
Th. Feudel
, M. Horstmann
, et al.
·
Materials Science in Semiconductor Processing
·
3
Reduced Parameter Fluctuation with Laser and Flash Lamp Anneal for 65nm Volume Production
2007
·
Thomas Feudel
, B Bayha
, et al.
·
ECS Transactions
·
2
Advanced transistor structures for high performance microprocessors
2004
·
M. Horstmann
, D. Greenlaw
, et al.
·
IEEE International Conference on IC Design and Technology (ICICDT)
·
2
Show more works
View as search
Works count:
8
Citation count:
191
H-index:
5
I10-index:
4
Year
Topic
Type