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Kyoungsub Shin

Observed names: Kyoung-Sub Shin, Kyoung‐Sub Shin
OpenAlex ID: A5111896916
Inductively Coupled Pulsed Plasmas in the Presence of Synchronous Pulsed Substrate Bias for Robust, Reliable, and Fine Conductor Etching
2009 · S. Banna, A. Agarwal, et al. · IEEE Transactions on Plasma Science · 118
Synchronous Pulse Plasma Operation upon Source and Bias Radio Frequencys for Inductively Coupled Plasma for Highly Reliable Gate Etching Technology
2009 · Ken Tokashiki, Hong Cho, et al. · Japanese Journal of Applied Physics · 42
Dual stress capping layer enhancement study for hybrid orientation finFET CMOS technology
2006 · Kyoungsub Shin, Chi On Chui, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 26
The gate misalignment effects of the sub-threshold characteristics of sub-100 nm DG-MOSFETs
2002 · Hiu Yung Wong, Kyoungsub Shin, et al. · IEEE Hong Kong Electron Devices Meeting · 21
Resolving critical dimension drift over time in plasma etching through virtual metrology based wafer-to-wafer control
2017 · Ho Ki Lee, Kye Hyun Baek, et al. · Japanese Journal of Applied Physics · 20
Study of Metal–Dielectric Interface for Improving Electrical Properties and Reliability of DRAM Capacitor
2022 · HanJin Lim, Jae Hyoung Choi, et al. · Advanced Materials Technologies · 19
Intrinsic Advantages of SOI Multiple-Gate MOSFET (MuGFET) for Low Power Applications
2007 · Weize W. Xiong, C. Rinn Cleavelin, et al. · ECS Transactions · 14
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FinFET Performance Enhancement with Tensile Metal Gates and Strained Silicon on Insulator (sSOI) Substrate
2006 · Weize Xiong, Kyoungsub Shin, et al. · Conference digest · 12
Effect of tensile capping layer on 3-D stress profiles in FinFET channels
2005 · Kyoungsub Shin, T. Lauderdale, et al. · Conference digest · 11
Dual-Bit Gate-Sidewall Storage FinFET NVM and New Method of Charge Detection
2007 · Alvaro Padilla, Kyoungsub Shin, et al. · IEEE Electron Device Letters · 8
Analysis of gate oxide damage by ultraviolet light during oxide deposition in high density plasma
2011 · Dong Kwon Kim, JeongYun Lee, et al. · Thin Solid Films · 7
Study on Tunnel Oxide Degradation by Metal Pad Etch-InducedPlasma Damage in 0.04 $mu$m Flash Memory Technology
2009 · Ilsub Chung, Jeongyun Lee, et al. · Journal of the Korean Physical Society · 6
Low-k film damage-resistant CO chemistry-based ash process for low-k/Cu interconnection in flash memory devices
2009 · Jeongyun Lee, Wan-Jae Park, et al. · Thin Solid Films · 6
Issues of contact etching and pre-treatment in Schottky contact
2009 · Haksun Lee, Kyoungsub Shin, et al. · Thin Solid Films · 5
An application study on the stochastic effect of EUV photons
2020 · Jongsu Kim, Hyekyoung Jue, et al. · SPIE Conference on Extreme Ultraviolet (EUV) Lithography · 2
Mechanism and CHARM2 Evaluation of P-Channel Metal Oxide Semiconductor Threshold Voltage Drop during High Density Plasma Heat-up Process
2009 · Dong-Hwan Kim, Jeongyun Lee, et al. · Japanese Journal of Applied Physics · 2
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Suppression of topography dependent charging using a phase-controlled pulsed inductively coupled plasma
2003 · Kyoung-Sub Shin, Wan-Jae Park, et al. · International Symposium on Plasma Process-Induced Damage · 2
Study of Metal–Dielectric Interface for Improving Electrical Properties and Reliability of DRAM Capacitor (Adv. Mater. Technol. 20/2023)
2023 · HanJin Lim, Jae Hyoung Choi, et al. · Advanced Materials Technologies · 1
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Charge-up damage of dual gate transistor during RF pre-cleaning of metal contact before barrier metal deposition
2003 · Wan-Jae Park, Kyoung-Sub Shin, et al. · International Symposium on Plasma Process-Induced Damage · 1
Evaluation of plasma-induced charging damage on metal contact process
2003 · Kyoung-Sub Shin, Ji-Soo Kim, et al. · International Conference on VLSI and CAD · 1
A study on the ion beam etching characteristics in the high aspect ratio contact
2016 · Ilhyeong Lee, Jong-Kyu Kim, et al. · 한국진공학회 학술발표회초록집
Multi-Gate MOSFETs with Dual Contact Etch Stop Liner Stressors on Tensile Metal Gate and Strained Silicon on Insulator (sSOI)
2007 · Che-Hua Hsu, Weize Xiong, et al. · International Symposium on VLSI Technology, Systems and Applications (VLSI-TSA)
Substrate Biased Plasma Etching Technique for Fabrication of Spintronic Devices
2005 · K. I. Lee, Wooyoung Shim, et al. · 한국자기학회 학술연구발표회 논문개요집
Works count: 23
Citation count: 324
H-index: 9
I10-index: 9
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