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Joaquin Torres

Room temperature electroless plating copper seed layer process for damascene interlevel metal structures
2000 · Joseph P O’Kelly, Karen F Mongey, et al. · Microelectronic Engineering · 55
Continuity and morphology of TaN barriers deposited by Atomic Layer Deposition and comparison with physical vapor deposition
2004 · Wim F.A. Besling, Marie-Laurence Ignacimouttou, et al. · Microelectronic Engineering · 14
Process optimization of copper MOCVD using modeling experimental design
1995 · Marie-José Mouche, Jean-Luc Mermet, et al. · Applied Surface Science · 11
Optimization of CVD dielectric process to achieve reliable ultra low-k air gaps
2002 · Vincent Arnal, Joaquin Torres, et al. · Microelectronic Engineering · 9
Impact of dielectric stack and interface adhesion on mechanical properties of porous ultra low-k
2005 · Julien Vitiello, Arno Fuchsmann, et al. · Microelectronic Engineering · 7
Copper alloy seed integration for reliability improvement
2005 · Wim F.A. Besling, X. Federspiel, et al. · Microelectronic Engineering · 7
Design and performance of integrated antennas for wireless intra chip interconnections
2006 · Philippe Benech, Fabien Ndagijimana, et al. · Annual Conference of the IEEE Industrial Electronics Society (IECON) · 5
Intra-chip wireless interconnections based on high performances integrated antennas
2005 · Anna Triantafyllou, Alexis Farcy, et al. · Solid-State Electronics · 5
Influence of the sidewall diffusion barrier on the transport properties of advanced Cu/low-k interconnects
2005 · Cyril Guedj, Jean-Frédéric Guillaumond, et al. · Microelectronic Engineering · 5
Challenges for Interconnect of Future CMOS Generations : Implementation of Emerging Processes and Alternative Architectures
2006 · Vincent Arnal, Laurent Gosset, et al. · ECS Meeting Abstracts · 3
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Integrated Antennas for Wireless Interconnections on Silicon up to 110 GHz
2008 · Anna Triantafyllou, Nicolas Corrao, et al. · European Microwave Conference (EuMC) · 1
Mechanical Integrity Study of Air Gap Structures Assisted by FE Simulations
2008 · Stephane Moreau, Fré;déric Gaillard, et al. · MRS Proceedings
High Transmission Gain Antenna on SOI Substrate for VLSI wireless Interconnects
2005 · Triantafyllou, A., Farcy, A., et al. · HAL
Design and characterization of dipoles antenna on SOI-substrate for intra chip wireless interconnections
2005 · Triantafyllou, A., Farcy, A., et al. · HAL
Works count: 14
Citation count: 122
H-index: 6
I10-index: 3
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