Work

On Power-profiling and Pattern Generation for Power-safe Scan Tests

Year: 2007

Type: conference-paper

Source: Design, Automation, and Test in Europe

DOI: 10.1109/date.2007.364648

Authors: V.R. Devanathan, C.P. Ravikumar, V. Kamakoti

Institutions: Texas Instruments (India), Indian Institute of Technology Madras

Language: English

Topic: VLSI and Analog Circuit Testing

Subfield: Hardware and Architecture

Field: Computer Science

Domain: Physical Sciences

SDG: Industry, innovation and infrastructure

Open Access status: closed

OpenAlex ID: W1980499623

FWCI: 0.626

Cites: 17

Cited by: 26

Related to: 10