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5-GHz 32-bit integer execution core in 130-nm dual-V/sub T/ CMOS

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Year: 2002
Type: article
Source: IEEE Journal of Solid-State Circuits
DOI: 10.1109/jssc.2002.803944
Authors: S. Vangal, M.A. Anders, N. Borkar, E. Seligman, V. Govindarajulu, V. Erraguntla, H. Wilson, A. Pangal, V. Veeramachaneni, J.W. Tschanz, Y. Ye, D. Somasekhar, B.A. Bloechel, G.E. Dermer, R.K. Krishnamurthy, K. Soumyanath, S. Mathew, S.G. Narendra, M.R. Stan, S. Thompson, V. De, S. Borkar
Institutions: Intel (United States), University of Virginia
Language: English

Topic: Low-power high-performance VLSI design
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
SDG: Industry, innovation and infrastructure

Open Access status: closed

Funder: Intel Corporation
OpenAlex ID: W1990297261
FWCI: 4.471
Cites: 6
Cited by: 35
Related to: 10
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