Strain enhanced low-VT CMOS featuring La/Al-doped HfSiO/TaC and 10ps invertor delay
Year: 2008
Type: conference-paper
Source: Symposium on VLSI Technology
Authors: S. Kubicek, T. Schram, E. Rohr, V. Paraschiv, R. Vos, M. Demand, C. Adelmann, T. Witters, L. Nyns, A. Delabie, L.-A. Ragnarsson, T. Chiarella, C. Kerner, A. Mercha, B. Parvais, M. Aoulaiche, C. Ortolland, H. Yu, A. Veloso, L. Witters, R. Singanamalla, T. Kauerauf, S. Brus, C. Vrancken, V.S. Chang, S-Z. Chang, R. Mitsuhashi, Y. Okuno, A. Akheyar, H.-J. Cho, J. Hooker, B.J. O'Sullivan, S. Van Elshocht, K. De Meyer, M. Jurczak, P. Absil, S. Biesemans, T. Hoffmann
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2139052599