Work

Performance and Modeling of Si-Nanocrystal Double-Layer Memory Devices With High- $k$ Control Dielectrics

Year: 2012

Type: article

Source: IEEE Transactions on Electron Devices

DOI: 10.1109/ted.2012.2182769

Authors: G. Gay, G. Molas, M. Bocquet, E. Jalaguier, M. Gely, L. Masarotto, J. P. Colonna, H. Grampeix, F. Martin, P. Brianceau, V. Vidal, R. Kies, T. Baron, G. Ghibaudo, B. De Salvo

Institutions: Commissariat à l'Énergie Atomique et aux Énergies Alternatives, Laboratoire d'Électronique des Technologies de l'Information, Centre National de la Recherche Scientifique, Laboratoire des Technologies de la Microélectronique, Institut polytechnique de Grenoble, Micro and Nanotechnology Innovation Centre

Language: English

Topic: Semiconductor materials and devices

Subfield: Electrical and Electronic Engineering

Field: Engineering

Domain: Physical Sciences

Open Access status: closed

OpenAlex ID: W2147677597

FWCI: 2.001

Cites: 27

Cited by: 14

Related to: 10