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Author

Arthur Keigler

Observed names: A. Keigler, A. L. Keigler, Arthur L. Keigler
OpenAlex ID: A5035731117
Diffusion Boundary Layer Studies in an Industrial Wafer Plating Cell
2005 · B. Q. Wu, Z. Liu, et al. · Journal of The Electrochemical Society · 21
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Electron-beam-induced current measurements in silicon-on-insulator films prepared by zone-melting recrystallization
1983 · E. W. Maby, H. A. Atwater, et al. · Applied Physics Letters · 10
Enabling 3-D design
2007 · Arthur Keigler, Kathy O'Donnell, et al. · 6
Reaction Engineering of Through-Chip Via Filling for Wafer-Level 3D Packaging
2007 · D.P. Barkey, J. Callahan, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 5
Electrocodeposition of Silver Particles with Tin for Fabrication of Lead-Free Solder Bumps
2006 · Dale P. Barkey, B. Wu, et al. · ECS Transactions · 3
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The Role of Mass Transfer in Removal of Cross-Linked Sacrificial Layers in 3DI Applications
2014 · Mani Sobhian, Daniel L. Goodman, et al. · Diffusion and defect data, solid state data. Part B, Solid state phenomena/Solid state phenomena · 2
Electroplated Copper Pillar Feature Effects
2010 · Jim Zhang, Arthur Keigler, et al. · Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) · 2
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Studies on Through-Chip Via Filling for Wafer-Level 3D Packaging
2006 · D. Barkey, John Callahan, et al. · ECS Meeting Abstracts · 2
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Solder Void Formation in Lead Free Solder
2012 · Charles L. Arvin, Eric Perfecto, et al. · ECS Meeting Abstracts · 1
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Challenges of ECD Panel Fan-Out in High Volume and Potential Solutions
2017 · Jon Hander, Demetrius Papapanayiotou, et al. · Wafer-Level Packaging Symposium
High-Speed Removal of Thick Negative Photoresist in Advanced Packaging Applications
2013 · Mani Sobhian, Arthur Keigler, et al. · Wafer-Level Packaging Symposium
TSV Filling
2011 · Arthur Keigler · Pan Stanford Publishing eBooks
Interfacial Voids at the Under Bump Metallurgy and Solder Interface
2011 · Charles L. Arvin, Eric Perfecto, et al. · ECS Meeting Abstracts
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Cu Pillar Electroplating Process Control for Wafer Level Packaging
2010 · Jim Zhang, Richard Hollman, et al. · Wafer-Level Packaging Symposium
Robust Through-Silicon-Via Electroplating
2007 · Arthur L. Keigler, Bill Wu, et al. · ECS Meeting Abstracts
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Pattern Effects on Electroplated Copper Pillars
2006 · Arthur Keigler, Bill Wu, et al. · Wafer-Level Packaging Symposium
Formation of AuSn Bumps for 3D Chip Stacking by Electrodeposition
2006 · B. Wu, Al Ruff, et al. · ECS Meeting Abstracts
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An Economical Wafer Electroplating System for Thick Film Structures
2006 · Arthur Keigler, Zhenqui Liu, et al. · ECS Meeting Abstracts
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Formation of Copper Pillar Bumps by High Speed Copper Electroplating
2006 · Bill Wu, Zhenqui Liu, et al. · ECS Meeting Abstracts
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Electrocodeposition of Silver Particles with Tin for Fabrication of Lead-Free Solder Bumps
2006 · Dale Barkey, B. Wu, et al. · ECS Meeting Abstracts
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Works count: 20
Citation count: 52
H-index: 4
I10-index: 2
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