Author

Keith Gronlund

Observed name: K. Gronlund

Observed institution: ASML (United States)

OpenAlex ID: A5077730208

An innovative Source-Mask co-Optimization (SMO) method for extending low k1 imaging

2008 · Stephen Hsu, Luoqi Chen, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 50

Fast 3D thick mask model for full-chip EUVL simulations

2013 · Peng Liu, Xiaobo Xie, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 33

EUV source-mask optimization for 7nm node and beyond

2014 · Xiaofeng Liu, Rafael Howell, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 29

EUV resolution enhancement techniques (RETs) for k10.4 and below

2015 · Stephen Hsu, Rafael Howell, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 28

Performance of a programmable illuminator for generation of freeform sources on high NA immersion systems

2009 · Melchior Mulder, André Engelen, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 28

Source-mask co-optimization: optimize design for imaging and impact of source complexity on lithography performance

2009 · Stephen Hsu, Zhipan Li, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 24

Application of EUV resolution enhancement techniques (RET) to optimize and extend single exposure bi-directional patterning for 7nm and beyond logic designs

2016 · Ryoung-Han Kim, Obert Wood, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 18

A new source optimization approach for 2X node logic

2011 · Kazuya Iwase, Peter De Bisschop, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 17

SMO for 28-nm logic device and beyond: impact of source and mask complexity on lithography performance

2010 · Seiji Nagahara, Kazuyuki Yoshimochi, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 13

"Smart" source, mask, and target co-optimization to improve design related lithographically weak spots

2014 · No-Young Chung, Pil-Soo Kang, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 12

Design intent optimization at the beyond 7nm node: the intersection of DTCO and EUVL stochastic mitigation techniques

2017 · Michael Crouse, Lars Liebmann, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 11

RET masks for the final frontier of optical lithography

2005 · J. F. Chen, Douglas van den Broeke, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 11

A physical resist shrinkage model for full-chip lithography simulations

2016 · Peng Liu, Leiwu Zheng, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 7

Compact modeling of negative tone development resist with photo decomposable quencher

2019 · Ao Chen, Kar Kit Koh, et al. · SPIE Optical Microlithography · 3

Massive metrology using fast e-beam technology improves OPC model accuracy by >2x at faster turnaround time

2018 · Qian Zhao, ChangAn Wang, et al. · Metrology, Inspection, and Process Control XXXVI · 3

Holistic lithography for EUV: NXE:3100 characterization of first printed wafers using an advanced scanner model and scatterometry

2011 · Frank A. J. M. Driessen, Natalia Davydova, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2

Using FlexRay in Computational Lithography

2011 · Robert Socha, Wenjin Shao, et al. · Japanese Journal of Applied Physics · 2

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Extension of optical lithography by mask-litho integration with computational lithography

2010 · T. Takigawa, K. Gronlund, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 2

A holistic methodology to drive process window entitlement and its application to 20nm logic

2015 · Lalit Shokeen, Ayman Hamouda, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE · 1

Accurate characterization of 2D etch bias by capturing surrounding effects from resist and trench areas

2017 · Yongfa Fan, Leiwu Zheng, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Patterning optimization for 55nm design rule DRAM/flash memory using production-ready customized illuminations

2005 · Ting Chen, Doug Van Den Broeke, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Precision process calibration and CD predictions for low-k 1 lithography

2005 · Ting Chen, Sangbong Park, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Resist model calibration using 2D developed patterns for low-k 1 process optimization and wafer printing predictions

2004 · Ting Chen, Douglas Van Den Broeke, et al. · Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE

Works count: 23

Citation count: 294

H-index: 11

I10-index: 12