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Fujitsu Semiconductor (Japan)
Alternate names:
Fujitsu Microelectronics Limited,
Fujitsu Semiconductor Limited,
富士通セミコンダクター
Parent institution:
Fujitsu (Japan)
ROR:
03rxn7c50
OpenAlex ID:
I4405284546
Advanced channel engineering achieving aggressive reduction of VT variation for ultra-low-power applications
2011
·
K. Fujita
, Y. Torii
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
59
A CMOS 6-b, 400-MSample/s ADC with error correction
1998
·
S. Tsukamoto
, W.G. Schofield
, et al.
·
IEEE Journal of Solid-State Circuits
·
55
SEILA: Soft error immune latch for mitigating multi-node-SEU and local-clock-SET
2010
·
Taiki Uemura
, Yoshiharu Tosaka
, et al.
·
IEEE International Reliability Physics Symposium proceedings
·
50
Development of highly reliable ferroelectric random access memory and its Internet of Things applications
2018
·
Takashi Eshita
, Wensheng Wang
, et al.
·
Japanese Journal of Applied Physics
·
46
A 0.04MM316NW Wireless and Batteryless Sensor System with Integrated Cortex-M0+ Processor and Optical Communication for Cellular Temperature Measurement
2018
·
Xiao Wu
, Inhee Lee
, et al.
·
Symposium on VLSI Circuits
·
46
A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE
2014
·
Kazuaki Oishi
, Eiji Yoshida
, et al.
·
IEEE Journal of Solid-State Circuits
·
45
Ferroelectric random access memory (FRAM) devices
2014
·
T. Eshita
, T. Tamura
, et al.
·
Elsevier eBooks
·
42
Dynamic performances of GaN-HEMT on Si in cascode configuration
2014
·
Tatsuya Hirose
, Miki Imai
, et al.
·
Conference proceedings/Conference proceedings - IEEE Applied Power Electronics Conference and Exposition
·
40
A fully integrated triple-band CMOS power amplifier for WCDMA mobile handsets
2012
·
Kouichi Kanda
, Yoichi Kawano
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
30
A CMOS 6-b, 200 MSample/s, 3 V-supply A/D converter for a PRML read channel LSI
1996
·
S. Tsukamoto
, I. Dedic
, et al.
·
IEEE Journal of Solid-State Circuits
·
27
Ultra thinning 300-mm wafer down to 7-µm for 3D wafer Integration on 45-nm node CMOS using strained silicon and Cu/Low-k interconnects
2009
·
Y. S. Kim
, A. Tsukune
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
25
A sixth-order triple-loop sigma-delta CMOS ADC with 90 dB SNR and 100 kHz bandwidth
2002
·
I. Dedic
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
25
A highly integrated 65-nm SoC process with enhanced power/performance of digital and analog circuits
2012
·
L. T. Clark
, D. Zhao
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
23
A 224 PW 260 PPM/°C Gate-Leakage-Based Timer for Ultra-Low Power Sensor Nodes with Second-Order Temperature Dependency Cancellation
2018
·
Jongyup Lim
, Taekwang Jang
, et al.
·
Symposium on VLSI Circuits
·
22
An 85-mV input, 50-µs startup fully integrated voltage multiplier with passive clock boost using on-chip transformers for energy harvesting
2014
·
Hiroshi Fuketa
, Youichi Momiyama
, et al.
·
European Solid-State Circuits Conference (ESSCIRC)
·
21
Soft-Error in SRAM at Ultra-Low Voltage and Impact of Secondary Proton in Terrestrial Environment
2013
·
Taiki Uemura
, Takashi Kato
, et al.
·
IEEE Transactions on Nuclear Science
·
21
Development of sub 10-µm ultra-thinning technology using device wafers for 3D manufacturing of terabit memory
2010
·
N. Maeda
, Y. S. Kim
, et al.
·
Symposium on VLSI Technology
·
21
The 10th Generation 16-Core SPARC64™ Processor for Mission Critical UNIX Server
2013
·
Ryuji Kan
, Tomohiro Tanaka
, et al.
·
IEEE Journal of Solid-State Circuits
·
20
Angular Dependency of Neutron-Induced Multiple Cell Upsets in 65-nm 10T Subthreshold SRAM
2012
·
R. Harada
, S. Abe
, et al.
·
IEEE Transactions on Nuclear Science
·
20
CP element based design for 14nm node EBDW high volume manufacturing
2012
·
Takashi Maruyama
, Yasuhide Machida
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
19
32Gb/s data-interpolator receiver with 2-tap DFE in 28nm CMOS
2013
·
Y. Doi
, T. Shibasaki
, et al.
·
Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference
·
17
A real-time temperature-compensated CMOS RF on-chip power detector with high linearity for wireless applications
2012
·
Hiroyuki Nakamoto
, Masahiro Kudo
, et al.
·
European Solid-State Circuits Conference (ESSCIRC)
·
17
Power Reduction and BTI Mitigation of Data-Cache Memory Based on the Storage Management of Narrow-Width Values
2019
·
Nezam Rohbani
, Hiroaki Gau
, et al.
·
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
·
16
Development of ferroelectric RAM (FRAM) for mass production
2014
·
T. Eshita
, W. Wang
, et al.
·
IEEE International Symposium on Applications of Ferroelectrics (ISAF)
·
16
Origin analysis of thermal neutron soft error rate at nanometer scale
2015
·
Takashi Yamazaki
, Takashi Kato
, et al.
·
Journal of Vacuum Science & Technology B Nanotechnology and Microelectronics Materials Processing Measurement and Phenomena
·
15
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Works count:
152
Citation count:
5,639
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