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Lars W. Liebmann
Observed names:
L. Liebmann,
L. W. Liebmann,
Lars Liebmann
Institution:
Athens Technical College
Observed institutions:
University of Vermont,
IBM (United States),
University of California, Los Angeles,
Rensselaer Polytechnic Institute,
Athens Technical College,
GlobalFoundries (United States),
IBM Research - Austin,
IBM Research - Albany,
IBM Research and Development Inc. (United States)
show all 9
OpenAlex ID:
A5073775409
A 7nm FinFET technology featuring EUV patterning and dual strained high mobility channels
2016
·
R. Xie
, P. Montanini
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
150
Scaling Challenges for Advanced CMOS Devices
2017
·
Ajey P. Jacob
, Ruilong Xie
, et al.
·
International Journal of High Speed Electronics and Systems
·
140
Layout impact of resolution enhancement techniques
2003
·
Lars W. Liebmann
·
International Symposium on Physical Design
·
112
A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI
2014
·
K. -I. Seo
, B. Haran
, et al.
·
Symposium on VLSI Technology
·
103
Co-Optimization of Circuits, Layout and Lithography for Predictive Technology Scaling Beyond Gratings
2010
·
Tejas Jhaveri
, Vyacheslav Rovner
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
98
TCAD development for lithography resolution enhancement
2001
·
L. W. Liebmann
, S. M. Mansfield
, et al.
·
IBM Journal of Research and Development
·
75
Overcoming scaling barriers through design technology CoOptimization
2016
·
Lars Liebmann
, Jia Zeng
, et al.
·
Symposium on VLSI Technology
·
63
High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell
2005
·
E. Leobandung
, H. Nayakama
, et al.
·
Symposium on VLSI Technology
·
63
High-performance circuit design for the RET-enabled 65-nm technology node
2004
·
Lars W. Liebmann
, Arnold E. Barish
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
51
The daunting complexity of scaling to 7NM without EUV: pushing DTCO to the extreme
2015
·
Lars Liebmann
, Albert Chu
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
50
Accurate performance evaluation for the horizontal nanosheet standard-cell design space beyond 7nm technology
2017
·
Y. M. Lee
, M. H. Na
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
48
Resolution enhancement techniques in optical lithography: It's not just a mask problem
2001
·
Lars W. Liebmann
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
46
Simplify to survive: prescriptive layouts ensure profitable scaling to 32nm and beyond
2009
·
Lars Liebmann
, Larry Pileggi
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
45
Standard Cell Layout Regularity and Pin Access Optimization Considering Middle-of-Line
2015
·
Wei Ye
, Bei Yu
, et al.
·
ACM Great Lakes Symposium on VLSI (GLSVLSI)
·
42
Reducing DfM to practice: the lithography manufacturability assessor
2006
·
Lars Liebmann
, Scott Mansfield
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
40
Pushing multiple patterning in sub-10nm
2015
·
David Z. Pan
, Lars Liebmann
, et al.
·
ACM/IEEE Design Automation Conference (DAC)
·
39
Decomposition-aware standard cell design flows to enable double-patterning technology
2011
·
Lars Liebmann
, David Pietromonaco
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
36
CFET Design Options, Challenges, and Opportunities for 3D Integration
2021
·
L. Liebmann
, J. Smith
, et al.
·
Technical digest - International Electron Devices Meeting/Technical digest
·
34
Lithographic effects of mask critical dimension error
1998
·
Alfred K. K. Wong
, Richard A. Ferguson
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
33
Optimizing style options for subresolution assist features
2001
·
Lars W. Liebmann
, James A. Bruce
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
32
Layout Decomposition and Legalization for Double-Patterning Technology
2013
·
Rani S. Ghaida
, Kanak B. Agarwal
, et al.
·
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
·
29
DfM, the teenage years
2008
·
Lars Liebmann
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
28
Lithographic comparison of assist feature design strategies
2000
·
Scott M. Mansfield
, Lars W. Liebmann
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
28
Layout optimization at the pinnacle of optical lithography
2003
·
Lars W. Liebmann
, Greg A. Northrop
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
24
Optical proximity correction: a first look at manufacturability
1994
·
Lars W. Liebmann
, Brian J. Grenon
, et al.
·
Proceedings of SPIE, the International Society for Optical Engineering/Proceedings of SPIE
·
24
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Works count:
124
Citation count:
2,066
H-index:
24
I10-index:
59
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