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Author

Fengwei Dai

Observed name: Dai Fengwei
ORCID: 0000-0002-5396-8563
Observed ORCID: 0000-0002-5396-8563
OpenAlex ID: A5102113678
Properties and electric characterizations of tetraethyl orthosilicate-based plasma enhanced chemical vapor deposition oxide film deposited at 400°C for through silicon via application
2013 · Meiying Su, Daquan Yu, et al. · Thin Solid Films · 19
Research on 3D Optical Module Integrating Edge Coupler and TSV
2022 · Qi Zheng, Peng Yang, et al. · Journal of Lightwave Technology · 16
Development and reliability study of 3D WLCSP for CMOS image sensor using vertical TSVs with 3:1 aspect ratio
2017 · Zhiyi Xiao, Mingjun Yao, et al. · Microsystem Technologies · 15
Investigation of intermetallic compound and voids growth in fine-pitch Sn–3.5Ag/Ni/Cu microbumps
2017 · Dongfan Wang, Huiqin Ling, et al. · Journal of Materials Science Materials in Electronics · 14
The development of low cost Through Glass Via (TGV) interposer using additive method for via filling
2012 · Yu Sun, Daquan Yu, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 12
Effect of IMC growth on thermal cycling reliability of micro solder bumps
2013 · Haiyan Liu, Cheng Xu, et al. · IEEE Electronics Packaging Technology Conference (EPTC) · 11
High frequency characterization and analysis of through silicon vias and coplanar waveguides for silicon interposer
2014 · Huijuan Wang, Xiaoli Ren, et al. · Microsystem Technologies · 9
Spray coating process with polymer material for insulation in CIS-TSV wafer-level-packaging
2014 · Yuechen Zhuang, Daquan Yu, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 9
Numerical simulation and experimental verification of copper plating with different additives for through silicon vias
2012 · Chongshen Song, Heng Wu, et al. · Electronic System-Integration Technology Conference (ESTC) · 7
Accurate electrical simulation and design optimization for silicon interposer considering the MOS effect and eddy currents in the silicon substrate
2012 · Jing Zhou, Lixi Wan, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 7
Development of a Silicon Interposer: Toward an Ultralow Radioactivity Background Photodetector System
2022 · Haibo Yang, Qidong Wang, et al. · IEEE Transactions on Nuclear Science · 5
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Via last TSV process for wafer level packaging
2016 · Xiangmeng Jing, Fengwei Dai, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 5
The study of backside TSV reveal process by direct Si/Cu grinding and polishing
2013 · Kai Xue, Daquan Yu, et al. · IEEE Electronics Packaging Technology Conference (EPTC) · 5
Study of equivalent thermal modeling and simulation of 2.5D/3D stacked dies module
2013 · Fengwei Dai, Daquan Yu, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 5
Newly developed in-situ formation of SnAg and SnAgCu solder on copper pillar bump
2011 · Fengwei Dai, Daquan Yu, et al. · IEEE Electronics Packaging Technology Conference (EPTC) · 5
Process Development of Ultra-Fine Pitch High Density Micro Bumps
2018 · Dengfeng Yang, Fengwei Dai, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 4
Low temperature wafer level conformal polymer dielectric spray coating for through silicon vias with 2:1 aspect ratio
2014 · Yuechen Zhuang, Daquan Yu, et al. · Microsystem Technologies · 4
High-speed through-silicon via filling method using Cu-cored solder balls
2012 · Ran He, Huijuan Wang, et al. · Journal of Semiconductors · 4
Three-dimensional PN junction capacitor for passive integration
2011 · Huijuan Wang, Lixi Wan, et al. · Applied Physics Letters · 4
Research on Ni3Sn4 intermetallic compound for 5μm diameter Cu/Ni/Sn-3.0Ag micro bumps
2021 · Fengwei Dai, David Wei Zhang, et al. · IEICE Electronics Express · 3
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3D Dislocation Multi-stack Fan-out Package of Ultra-thin Dies for Heterogeneous Integration
2021 · Lijun Chen, Feng Chen, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 3
Multi-chip Stacking with Fine Pitch μbumps and TSVs for Heterogeneous Integration
2020 · Yangyang Yan, Guojun Wang, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 3
Fluxless Bump Reflow in Activated Hydrogen Atmosphere
2018 · C. Christine Dong, Fisher Yu, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 3
Low Cost Wafer Level Packaging of MEMS Devices by Vertical Via-Last Process
2016 · Xiangmeng Jing, Fengwei Dai, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 3
A study of high-density embedded capacitor for silicon-substrate package
2010 · Huijuan Wang, Fengwei Dai, et al. · International Conference on Electronic Packaging Technology (ICEPT) · 3
Works count: 64
Citation count: 207
H-index: 8
I10-index: 6
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