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K. Ando

Observed names: Koich Ando, Koichi ANDO, Koichi Ando
OpenAlex ID: A5109224800
Mechanical stress effect of etch-stop nitride and its impact on deep submicron transistor design
2002 · S. Ito, H. Namba, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 163
Interface defects responsible for negative-bias temperature instability in plasma-nitrided SiON/Si(100) systems
2003 · Shinji Fujieda, Yoshinao Miura, et al. · Applied Physics Letters · 70
Mechanism of leakage current through the nanoscale SiO2 layer
1994 · Seido Nagano, Masaru Tsukiji, et al. · Journal of Applied Physics · 55
Infrared studies of transition layers at SiO2/Si interface
1998 · Haruhiko Ono, Taeko Ikarashi, et al. · Journal of Applied Physics · 53
Bonding configurations of nitrogen absorption peak at 960 cm−1 in silicon oxynitride films
1999 · Haruhiko Ono, Taeko Ikarashi, et al. · Applied Physics Letters · 52
Effect of mechanical stress induced by etch-stop nitride: impact on deep-submicron transistor performance
2002 · Shinya Ito, Hiroaki Namba, et al. · Microelectronics Reliability · 48
Influence of H2-annealing on the hydrogen distribution near SiO2/Si(100) interfaces revealed by in situ nuclear reaction analysis
2002 · Markus Wilde, Masuaki Matsumoto, et al. · Journal of Applied Physics · 41
250-MHz BiCMOS super-high-speed video signal processor (S-VSP) ULSI
1991 · J. Goto, K. Ando, et al. · IEEE Journal of Solid-State Circuits · 29
A 250MHz 16b 1-million Transistor BICMOS Super-high-speed Video Signal Processor
1991 · J. Goto, K. Ando, et al. · Digest of technical papers/Digest of technical papers - IEEE International Solid-State Circuits Conference · 22
The impact of nitrogen profile engineering on ultrathin nitrided oxide films for dual-gate CMOS ULSI
2002 · E. Hasegawa, M. Kawata, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 19
Reoxidation effects on the chemical bonding states of nitrogen accumulated at the oxynitride/silicon interface
2000 · Yoshinao Miura, Haruhiko Ono, et al. · Applied Physics Letters · 18
Lateral Profile of Trapped Charges in Split-Gate SONOS Memory
2010 · Yukihide Tsuji, Masayuki Terai, et al. · IEEE Transactions on Electron Devices · 9
Trends in Capacitor Dielectrics for DRAMs (Special Issue on LSI Memories)
1993 · Akihiko Ishitani, Pierre‐Yves Lesaicherre, et al. · IEICE Transactions on Electronics · 7
A 200-MHz 16-bit super high-speed signal processor (SSSP) LSI
1989 · M. Yamashina, J. Goto, et al. · IEEE Journal of Solid-State Circuits · 7
A 0.99-μm/sup 2/ loadless four-transistor SRAM cell in 0.13-μm generation CMOS technology
2002 · S. Masuoka, K. Noda, et al. · Symposium on VLSI Technology · 5
A novel method for evaluating electron/hole mismatch in scaled split-gate SONOS memories
2008 · Yukihide Tsuji, Masayuki Terai, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 4
Trapped-Hole-Enhanced Erase-Level Shift by FN-Stress Disturb in Sub-90-nm-Node Embedded SONOS Memory
2008 · Masayuki Terai, Yukihide Tsuji, et al. · IEEE Transactions on Electron Devices · 4
The effect of the floating gate/tunnel SiO/sub 2/ interface on FLASH memory data retention reliability
1996 · T. Kubota, K. Ando, et al. · IEEE International Reliability Physics Symposium proceedings · 4
0.10 μm TiSi2 technology utilizing nitrogen diffusion controlled RTA
1995 · Y. Matsubara, T. Sakai, et al. · Thin Solid Films · 4
Effect of ultraviolet irradiation upon the recombination lifetime of silicon wafers covered with a dielectric film
1993 · L. Zhong, K. Ando, et al. · Applied Physics Letters · 4
Higher Reliability Cu Pillar Bump on ENEPIG Substrate With Suppressed Ni3P for Automotive Applications
2025 · Hideaki Tsuchiya, Teruhiro Kuwajima, et al. · IEEE Electronic Components and Technology Conference (ECTC) · 3
Ultra-high-performance 0.13-μm embedded DRAM technology using TiN/HfO/sub 2//TiN/W capacitor and body-slightly-tied SOI
2003 · Y. Aoki, T. Ueda, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 3
New degradation mode of program disturb immunity of sub 90-nm node split-gate SONOS memory
2008 · Yukihide Tsuji, Masayuki Terai, et al. · IEEE International Reliability Physics Symposium proceedings · 2
A 0.23 μm/sup 2/ double self-aligned contact cell for gigabit DRAMs with a Ge-added vertical epitaxial Si pad
2002 · H. Koga, N. Kasai, et al. · Technical digest - International Electron Devices Meeting/Technical digest · 2
Novel salicide technology using Ti hydrogenation for 0.1 μm CMOS
2002 · K. Ando, Y. Matsubara, et al. · Symposium on VLSI Technology · 2
Works count: 32
Citation count: 634
H-index: 11
I10-index: 11
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