Integration of tall triple-gate devices with inserted TaxNy gate in a 0.274µm2 6T-SRAM cell and advanced CMOS logic circuits
Year: 2005
Type: article
Authors: Liesbeth Witters, N. Collaert, A. Nackaerts, M. Demand, S. Demuynck, Christie Delvaux, A. Lauwers, Kris Baert, S. Beckx, Werner Boullart, S. Brus, B. Degroote, Jean‐François de Marneffe, Abhisek Dixit, Christina De Meyer, Monique Ercken, M. W. Goodwin, Eric Hendrickx, N. Heylen, Patrick Jaenen, David Laidler, Philippe Leray, S. Locorotondo, Mireille Maenhoudt, Myriam Moelants, Ivan Pollentier, Kurt Ronse, R. Rooyackers, J. Van Aelst, Geert Vandenberghe, T. Vandeweyer, S. Vanhaelemeersch, M. Van Hove, J. Van Olmen, Staf Verhaegen, Janko Versluijs, C. Vrancken, Vincent Wiaux, Patrick Willems, Johan M. Wouters, M. Jurczak, S. Biesemans
Language: English
Subfield: Electrical and Electronic Engineering
Field: Engineering
Domain: Physical Sciences
Open Access status: closed
OpenAlex ID: W2585216159